About me

I am Ziyao Yin, currently an M.S. student in Electrical and Computer Engineering at Georgia Tech. I previously received my B.Eng. in Computer Science from the Department of Computer Science and Engineering at Southern University of Science and Technology (SUSTech) in Shenzhen, China.

My interests include computer architecture, hardware accelerators, and chip verification and design. I have experience in accelerator development and optimization, architecture-level simulation, and building verification testbenches and regression flows. I am also familiar with the RTL-to-GDSII flow. I am currently seeking opportunities in the chip industry, including verification and design roles.

If you would like to learn more about my work or connect, please feel free to reach out via the contact information below.

Email: tzuyaoyin [at] gmail [dot] com

CV: Here is my CV